1. Field of the Invention
This invention relates in general to communication networks for the simultaneous transmission of data messages between a plurality of source devices and a plurality of destination devices. More particularly, it relates to a communication network using a switching device specialized in the transfer of data messages. The switching device is called a communication processor, and is intended for use in multiprocessor data processing systems, e.g. for parallel processing of information.
2. Description of the Prior Art
In multiprocessor parallel information processing systems, the processors, which carry out programs or processes at their own speed ad in a partially asynchronous manner from one to the next, ned to communicate intermittently with one anther and/or with a set of memories. The transfer of data messages between the processors and memories in question should be carried out in optimal speed conditions, avoiding access conflicts at communication means level. To increase their power, these systems are expected to be able to carry out an ever-increasing number of processes in parallel. Under these conditions, it is necessary to efficiently solve:
the problems relating to the communication of data messages, and PA0 the problem of the division of work between the different processors and memories of the multiprocessor system.
A well known means of interconnecting several processors consists in connecting them all to one communication bus and in using a control unit to manage the data message exchanges between processors in a centralized and hierarchical fashion. The major drawback of this communication means by a single bus is to be only able to make, at a given moment, one communication form one processor the next. The single bus is penalizing all the more that the number of processors to be interconnected is high. Moreover, this drawback is only partially remedied by multiplying the number of communication buses.
To obviate these drawbacks, it was suggested that the data messages be exchanged through communication networks. Different architectures for these networks and particularly an "Omega" architecture presenting certain advantages are described by HWANG and BRIGGS in their publication entitled "Computer Architecture and Parallel Processing", McGRAW HILL edition, 1984, p. 350 to 354 and 481 to 502.
A communication network of the co-called "Omega" type disclosed by HWANG and BRIGGS enables a considerable improvement to be obtained in the speed of data transfers between processors. However, such a network still requires the use of a centralized control unit, entrusted with determining of the routing paths and solving the access conflicts on side of the switching devices. The need of this centralized control unit restricts the size of the network due to programming difficulty which is all the greater that the network is of large size. Furthermore, the work divide problem in this network is dealt with separately from the routing by another control unit which also has a programming difficulty increasing with the size of the network.